Master degree in Electronics Engineering, Electrical Engineering, Instrumentation Engineering, or related field of study and six years of experience in SoC verification or Bachelor degree in Electronics Engineering, Electrical Engineering, Instrumentation Engineering, or related field of study and eight years of progressive experience.  Six years of SoC verification in wired and wireless technologies, bus and memory protocols, peripherals, and embedded processors; C/C++; Verilog; SystemVerilog; VHDL; logic design and verification of high-speed multi-million gate SoC; development of verification strategies and test plans; lead SoC verification activities; and provide guidance and direction to verification team.

Plan, direct, and coordinate verification activities of complex SoC (System-on-a-chip), FPGA (Field Programmable Gate Arrays) and Hardware IP Cores in the areas of High Speed Networking, Network Security, Wired/Wireless communications, and Consumer Electronics; manage infrastructure development for design/verification flows, simulation automation, regression, and test report generation; study, identify, and determine the appropriate EDA (Electronic Design Automation) tool to use for designing electronic systems, including ASIC’s (Application Specific Integrated Circuits) and printed circuit boards; oversee architecture and design of test benches; guide the verification team in building a reusable verification environment using advanced functional verification techniques such as coverage-driven verification, constrained-random stimulus generation, and design-for-verification techniques; review test plans, code coverage, and functional coverage metrics; ensure completion of test plan implementation according to schedule, specifications, and objectives; and manage vendor relationships and partnership programs..